Power consumption is an important factor in the design of many electronic devices. Often, these devices must operate on a limited power supply. For example, devices such as mobile and wireless phones, mobile computers, and other devices are generally battery operated. To maximize the operating time in between changing or recharging batteries, mobile devices are often designed with low power consumption components and power saving features. In other applications, it is desirable to minimize the power consumption of devices, mobile and non-mobile, to reduce operating costs and/or extend the life of the devices and/or their components.
Many mobile devices include wireless communication devices and interfaces to send and receive data. These wireless communication devices and interfaces are often a significant source of power consumption. Various forms of wireless or over-the-air communication systems, including radio transmissions, have been employed.
Some of these mobile device have more than one mode of operation, including modes specifically designed to conserve power. Power saving modes vary in the extent that a device's components are cycled or powered off. These power saving modes are typically referred to by various names including standby mode, sleep mode, and idle mode. For purposes of this application, these terms may be used interchangeably to refer to a power savings mode where one or more components of the device are reconfigured to consume less power than during normal operation or no power at all.
Generally, radio communication systems include a radio (modem) device to transmit and receive signals, and a control unit to control the operation of the radio device.
Synthesizers are commonly employed within radio devices to lock on an operating, carrier, or transmission frequency. The terms operating frequency, carrier frequency, or transmission frequency are herein used interchangeably to mean the frequency or channel on which communications are received or transmitted.
Conventional synthesizers typically have relatively long tuning times when powered On. The synthesizer tuning time includes the time it takes the synthesizer to reach stable operation at a particular frequency. Some conventional synthesizers are implemented using a phase-lock-loop (PLL) design. One tuning delay, known as the channel-to-channel lock time, for a PLL-based synthesizer includes the time it takes to lock onto a desired frequency and phase. If a synthesizer is not able to power on and lock onto the desired operating frequency within a maximum time period, then a device may miss receiving or transmitting data.
One cause of tuning delays when a conventional PLL-based synthesizer is first powered On or changes operating frequencies is that the tuning time is not determinable or predictable because the initial phase is unknown and/or random. That is, the synthesizer may take a relatively short time, or a relatively long time beyond a maximum channel-to-channel time, to lock onto the desired frequency and phase.
One way to avoid missed transmissions is to keep the synthesizer powered on at all times, thereby avoiding power on delays. However, this is contrary to power efficiency since the synthesizer would drain needed power even when no transmissions are expected. Another scheme to avoid missed transmissions is to power On the synthesizer early enough to permit it to be operational by the time a transmission is expected. This typically requires that an external system, such as a control unit, manage and monitor the operation of the synthesizer. This adds complexity to the design of a communication system.
Therefore, there is a need for a synthesizer system with relatively short and predictable tuning times to achieve savings in average power consumption and that is simple to integrate into existing control units.